It’s ok to say ‘picometer’
The “Xnm” sizes have not related to any actual length for decades. It is purely marketing.
lol, no kidding.
Do you have any more information on this? I’d like to know how the hell this happened.
It started out as gate-length and then when we started building 3D transistors with FinFETs and gate-all-around, where the 2-dimensional gate-length is not comparable to “flat” transistors, they had to instead estimate the effective equivalent 2D gate-length that would give the same transistor density.
So the process name is now no longer a measure of any tangible feature size but more a descriptor of transistor density that is loosely consistent with the prior convention.
yes, I see now why you just said, “marketing”
lol
still, quite interesting
I wasn’t the original commenter but I suppose you could call it marketing, sure.
It seems like 1994 was where process nodes started to not be so correlated with their actual size, according to this IEEE article. In 1994, transistor features were actually smaller than what was advertised, up until the early 2000’s, where the naming became smaller than physical size. From what I understand, most of the gains in computing power have come from other improvements in processes and transistor geometry.
I guess the industry never really bothered changing their naming schemes, or couldn’t figure out a better way?
They actually decided to use Angstroms for the initial sub-nanometre processes.
FTA:
Whatever, Chosun Biz also claims that TSMC plans to begin mass production of the node following N2 in 2028. Known as A14 in TSMC parlance, where the “A” stands for angstroms, the next unit of measurement down from nanometers, a 2028 release would put it exactly two years behind N2 and thus maintain a biennial cadence of rolling out a new node every two years.
And Intel talked about it in 2021:
well, there ya go
Angstrom is not the next unit down from nanometers.
Picometers are the next unit down. Angstrom is a non SI antiquated measure.
Yeah, it’s pcgamer writing about silicon manufacturing. Even the headline is insane (“1nm chips” instead of “1nm process”).
This is very small.
You could fit about 7x1016 1nm chips on one 30cm wafer.
Imagine a beowulf cluster of those!
Source?
:P
I dunno, I don’t see any nanometers on there…
Yet big news!
